This technique relates to a field-effect transistor that has an extension region and also to a method of manufacturing a field-effect transistor.
In recent years, as miniaturization of field-effect transistors proceeds, there is a problem that desired electrical characteristics cannot be obtained because of the short channel effect. In order to suppress the short channel effect, there has been employed a configuration in which an extension region is formed so that impurities are ion-implanted therein more shallowly than the source region or the drain region. However, just forming the extension region as in the existing art is insufficient to suppress the short channel effect due to miniaturization of field-effect transistors.
In order to suppress the short channel effect due to further miniaturization of field-effect transistors, currently, a manner, that is, a so-called pocket or halo, in which impurity concentration in the semiconductor substrate of a channel portion is locally increased or a manner in which an extension region is formed more shallowly than that of the existing art is used. When the extension region is formed more shallowly than that of the existing art, it is desirable not to merely reduce the energy used for implanting impurities but to obtain a steep distribution of diffused impurity concentration after heat treatment. This is because, when impurity concentration distribution is gentle, it results in suppressing the amount of impurities introduced to make the extension region be shallow. Therefore, the resistance of the extension region becomes high and, hence, it leads to a decrease in electric current driving ability of the field-effect transistors.
In order to make the impurity concentration distribution of the extension region be steep, time or temperature for annealing is reduced. However, because of accelerated diffusion due to damage after ion implantation, it is necessary to control diffusion of the above impurities to obtain a desired steepness. There has been proposed a technology that controls diffusion of the impurities, which is, for example, described in Japanese Laid-open Patent Publication No. 2004-235603. In the technology, a region in which an extension region is formed is amorphized at the same time in the process in which a pocket region is formed, and a diffusion suppressing substance that suppresses diffusion of impurities is ion-implanted into the interface between an amorphized region and a crystallized region.